1. Field of the Invention
This invention relates to a QPSK (Quadrature Phase Shift Keying) demodulators and more particularly to a QPSK demodulator for obtaining a phase by an arithmetic operation based on a received signal.
2. Description of the Related Art
In conventional communication systems such as mobile communication, satellite communication and mobile-satellite communication, it has been common practice to use a demodulator utilizing a QPSK demodulating method. This QPSK demodulating method is exemplified by a method comprising the steps of orthogonal-converting a received signal into an in-phase component (I channel) and a quadrature component (Q channel), then converting the converted quadrature component signal into phase data and finally performing demodulation by a maximum likelihood estimation methods
FIG. 5 of the accompanying drawings is a block diagram of a conventional QPSK demodulator utilizing the above-mentioned QPSK demodulating method. This conventional QPSK demodulator comprises a quadrature converter 4 for orthogonal-converting a signal, which is received from an input terminal 2, into an in-phase component (I channel) and a quadrature component (Q channel), an analog-to-digital converter 6 for sampling and quantizing the converted quadrature component signal, an address decoder 8 for converting combinations of I and Q channels into addresses, a TAN.sup.-1 ROM 10 in which TAN.sup.-1 (Q/I) values are previously stored in association with every combination of I and Q channel base band signals, and a maximum likelihood estimation circuit 12 for QPSK demodulating the phase of the converted-in-phase signal by a maximum likelihood estimation method to output a signal from an output terminal 14.
In operation, a received signal from the input terminal 2 is converted into an address for the TAN.sup.-1 ROM 10 by the address decoder 8 after being converted into I and Q channel base band signals as it goes through the quadrature converter 4 and the analog-to-digital converter 6. The TAN.sup.-1 ROM 10 previously stores a TAN.sup.-1 (Q/I) value in association with every combination of I and Q channel base band signals I, Q. The conventional QPSK demodulator therefore converts the phase of data corresponding to the converted address by fetching phase data from the TAN.sup.-1 ROM 10 The maximum likelihood estimation circuit 12 is for performing QPSK demodulation by maximum likelihood estimation based on the input phase data The thus QPSK demodulated signals are outputted from the output terminal 14.
However, in order to perform phase conversion according to the conventional art, it is necessary to store in the TAN.sup.-1 ROM a TAN.sup.-1 (Q/I) value in association with every combination of values of I and Q channel base band signals, which means that it would be difficult to make the demodulator smaller in size and lower in cost. Assuming that the I and Q channel base band signals have a plus/minus 8 bit accuracy (-128 to 127), phase has a positive 8 bit accuracy (0 to 255), and each TAN.sup.-1 (Q/I) value is represented by 1 bytes it requires a TAN.sup.-1 ROM having a storage capacity of at minimum 65536(=2.sup.8 .times.2.sup.8) bytes for all of 2.sup.8 possible values of I and Q base band signals.